Glossary of ISA Extensions

The following unprivileged ISA extensions are defined in Volume I of the hRISC-V Instruction Set Manual.

  • M Extension for Integer Multiplication and Division

  • A Extension for Atomic Instructions

  • F Extension for Single-Precision Floating-Point

  • D Extension for Double-Precision Floating-Point

  • H Hypervisor Extension

  • Q Extension for Quad-Precision Floating-Point

  • C Extension for Compressed Instructions

  • B Extension for Bit Manipulation

  • V Extension for Vector Computation

  • Zifencei Instruction-Fetch Fence Extension

  • Zicsr Extension for Control and Status Register Access

  • Zicntr Extension for Basic Performance Counters

  • Zihpm Extension for Hardware Performance Counters

  • Zihintpause Pause Hint Extension

  • Zfh Extension for Half-Precision Floating-Point

  • Zfhmin Minimal Extension for Half-Precision Floating-Point

  • Zfinx Extension for Single-Precision Floating-Point in x-registers

  • Zdinx Extension for Double-Precision Floating-Point in x-registers

  • Zhinx Extension for Half-Precision Floating-Point in x-registers

  • Zhinxmin Minimal Extension for Half-Precision Floating-Point in x-registers

  • Zba Address Computation Extension

  • Zbb Bit Manipulation Extension

  • Zbc Carryless Multiplication Extension

  • Zbs Single-Bit Manipulation Extension

  • Zk Standard Scalar Cryptography Extension

  • Zkn NIST Cryptography Extension

  • Zknd AES Decryption Extension

  • Zkne AES Encryption Extension

  • Zknh SHA2 Hashing Extension

  • Zkr Entropy Source Extension

  • Zks ShangMi Cryptography Extension

  • Zksed SM4 Block Cypher Extension

  • Zksh SM3 Hashing Extension

  • Zkt Extension for Data-Independent Execution Latency

  • Zicbom Extension for Cache-Block Management

  • Zicbop Extension for Cache-Block Prefetching

  • Zicboz Extension for Cache-Block Zeroing

  • Zawrs Wait-on-reservation-set instructions

  • Zacas Extension for Atomic Compare-and-Swap (CAS) instructions

  • Zabha Extension for Byte and Halfword Atomic Memory Operations

  • Zbkb Extension for Bit Manipulation for Cryptography

  • Zbkc Extension for Carryless Multiplication for Cryptography

  • Zbkx Crossbar Permutation Extension

  • Zvbb - Vector Basic Bit-manipulation

  • Zvbc - Vector Carryless Multiplication

  • Zvkng - NIST Algorithm Suite with GCM

  • Zvksg - ShangMi Algorithm Suite with GCM

  • Zvkt - Vector Data-Independent Execution Latency

The following privileged ISA extensions are defined in Volume II of the RISC-V Instruction Set Manual.

  • Sv32 Page-based Virtual Memory Extension, 32-bit

  • Sv39 Page-based Virtual Memory Extension, 39-bit

  • Sv48 Page-based Virtual Memory Extension, 48-bit

  • Sv57 Page-based Virtual Memory Extension, 57-bit

  • Svpbmt, Page-Based Memory Types

  • Svnapot, NAPOT Translation Contiguity

  • Svinval, Fine-Grained Address-Translation Cache Invalidation

  • Hypervisor Extension

  • Sm1p11, Machine Architecture v1.11

  • Sm1p12, Machine Architecture v1.12

  • Ss1p11, Supervisor Architecture v1.11

  • Ss1p12, Supervisor Architecture v1.12

  • Ss1p13, Supervisor Architecture v1.13

  • Sstc Extension for Supervisor-mode Timer Interrupts

  • Sscofpmf Extension for Count Overflow and Mode-Based Filtering

  • Smstateen/Ssstateen Extension for State-enable

  • Svvptc Obviating Memory-management Instructions after Marking PTEs valid

  • Svadu Hardware Updating of A/D Bits

The following extensions have not yet been incorporated into the RISC-V Instruction Set Manual; the hyperlinks lead to their separate specifications.