11.1. "Zicond" Extension for Integer Conditional Operations, Version 1.0.0

The Zicond extension defines two R-type instructions that support branchless conditional operations.

RV32 RV64 Mnemonic Instruction

czero.eqz rd, rs1, rs2

Conditional zero, if condition is equal to zero

czero.nez rd, rs1, rs2

Conditional zero, if condition is nonzero

11.1.1. Instructions (in alphabetical order)

11.1.1.1. czero.eqz

Synopsis

Moves zero to a register rd, if the condition rs2 is equal to zero, otherwise moves rs1 to rd.

Mnemonic

czero.eqz rd, rs1, rs2

Encoding
svg
Description

If rs2 contains the value zero, this instruction writes the value zero to rd. Otherwise, this instruction copies the contents of rs1 to rd.

This instruction carries a syntactic dependency from both rs1 and rs2 to rd.

Furthermore, if the Zkt extension is implemented, this instruction’s timing is independent of the data values in rs1 and rs2.

SAIL code
  let condition = X(rs2);
  result : xlenbits = if (condition == zeros()) then zeros()
                                                else X(rs1);
  X(rd) = result;

11.1.1.2. czero.nez

Synopsis

Moves zero to a register rd, if the condition rs2 is nonzero, otherwise moves rs1 to rd.

Mnemonic

czero.nez rd, rs1, rs2

Encoding
svg
Description

If rs2 contains a nonzero value, this instruction writes the value zero to rd. Otherwise, this instruction copies the contents of rs1 to rd.

This instruction carries a syntactic dependency from both rs1 and rs2 to rd.

Furthermore, if the Zkt extension is implemented, this instruction’s timing is independent of the data values in rs1 and rs2.

SAIL code
  let condition = X(rs2);
  result : xlenbits = if (condition != zeros()) then zeros()
                                                else X(rs1);
  X(rd) = result;

11.1.2. Usage examples

The instructions from this extension can be used to construct sequences that perform conditional-arithmetic, conditional-bitwise-logical, and conditional-select operations.

11.1.2.1. Instruction sequences

Operation Instruction sequence Length

Conditional add, if zero
rd = (rc == 0) ? (rs1 + rs2) : rs1

czero.nez  rd, rs2, rc
add        rd, rs1, rd

2 insns

Conditional add, if non-zero
rd = (rc != 0) ? (rs1 + rs2) : rs1

czero.eqz  rd, rs2, rc
add        rd, rs1, rd

Conditional subtract, if zero
rd = (rc == 0) ? (rs1 - rs2) : rs1

czero.nez  rd, rs2, rc
sub        rd, rs1, rd

Conditional subtract, if non-zero
rd = (rc != 0) ? (rs1 - rs2) : rs1

czero.eqz  rd, rs2, rc
sub        rd, rs1, rd

Conditional bitwise-or, if zero
rd = (rc == 0) ? (rs1 | rs2) : rs1

czero.nez  rd, rs2, rc
or         rd, rs1, rd

Conditional bitwise-or, if non-zero
rd = (rc != 0) ? (rs1 | rs2) : rs1

czero.eqz  rd, rs2, rc
or         rd, rs1, rd

Conditional bitwise-xor, if zero
rd = (rc == 0) ? (rs1 ^ rs2) : rs1

czero.nez  rd, rs2, rc
xor        rd, rs1, rd

Conditional bitwise-xor, if non-zero
rd = (rc != 0) ? (rs1 ^ rs2) : rs1

czero.eqz  rd, rs2, rc
xor        rd, rs1, rd

Conditional bitwise-and, if zero
rd = (rc == 0) ? (rs1 & rs2) : rs1

and        rd, rs1, rs2
czero.eqz  rtmp, rs1, rc
or         rd, rd, rtmp

3 insns
(requires 1 temporary)

Conditional bitwise-and, if non-zero
rd = (rc != 0) ? (rs1 & rs2) : rs1

and        rd, rs1, rs2
czero.nez  rtmp, rs1, rc
or         rd, rd, rtmp

Conditional select, if zero
rd = (rc == 0) ? rs1 : rs2

czero.nez  rd, rs1, rc
czero.eqz  rtmp, rs2, rc
add        rd, rd, rtmp

Conditional select, if non-zero
rd = (rc != 0) ? rs1 : rs2

czero.eqz  rd, rs1, rc
czero.nez  rtmp, rs2, rc
add        rd, rd, rtmp