6.1. BRS-I ACPI Requirements
The Advanced Configuration and Power Interface Specification provides the OS-centric view of system configuration, various hardware resources, events and power management.
This section defines the BRS-I mandatory and optional ACPI requirements on top of existing ACPI [3] and UEFI [10] specification requirements. Additional non-normative guidance may be found in the firmware implementation guidance section.
| All content in this section is optional and recommended for BRS-B. |
| ID# | Rule |
|---|---|
Be 64-bits clean.
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MUST implement the hardware-reduced ACPI mode (no FACS table). |
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The Processor Properties Table (PPTT) MUST be implemented, even on systems with a simple hart topology. |
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The PCI Memory-mapped Configuration Space (MCFG) table MUST NOT be present if it violates [17]. |
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Only compatible PCIe segments, exposed via ECAM (Enhanced Configuration Access Mechanism), may be described in the MCFG. The MCFG MUST NOT require vendor-specific OS support. See PCI Services ([3], Section 4) for more ACPI requirements relating to PCIe support. See additional guidance. |
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A Serial Port Console Redirection Table [19] MUST be present on systems, where the graphics hardware is not present or not made
available to an OS loader via the standard |
In these cases, the table provides essential configuration for an early OS boot console. |
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An SPCR table, if present, MUST meet the following requirements:
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See additional guidance. |
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6.1.1. BRS-I ACPI Methods and Objects
This section lists additional requirements for ACPI methods and objects.
| ID# | Rule |
|---|---|
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The Current Resource Setting (_CRS) device method for a PCIe Root Complex SHOULD NOT return any descriptors for I/O ranges (such as created by ASL macros WordIO, DWordIO, QWordIO, IO, FixedIO, or ExtendedIO). |
Legacy PCI I/O BARs are uncommon in modern PCIe devices and support for PCI I/O space may complicate configuration of PCIe Root Complex hardware in a compliant manner. |
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The Possible Resource Settings ( |
ACPI resource descriptors are typically used to describe devices with fixed I/O regions that do not change. Flexible resource assignment is not supported by most modern ACPI OSes. |
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Per-hart device objects MUST be defined under |
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Systems supporting OS-directed hart performance control and power management MUST expose these via Collaborative Processor Performance Control (CPPC, [3] Section 8.4.6). |
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Processor idle states MUST be described using Low Power Idle ( |
Systems with a Real-Time Clock on an OS-managed bus (e.g. I2C, subject to arbitration issues due to access to the bus by the OS) MUST implement the Time and Alarm Device (TAD) with functioning |
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Also see |
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Systems implementing a TAD MUST be functional without additional system-specific OS drivers. |
In situations where the Time and Alarm Device (TAD) depends on a
vendor-specific OS driver for correct function (SPI, I2C, etc), the TAD MUST
be functional if the OS driver is not loaded. That is, when a dependent
driver is loaded, an AML method switches further accesses to go
through the driver-backed |
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PLIC and APLIC device objects MUST support
the Global System Interrupt Base ( |
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UART device objects with ID |
PLIC/APLIC namespace devices MUST be present in the ACPI namespace whenever corresponding MADT entries are present. See RVI ACPI IDs. |
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Also see AML_080 and additional guidance. |
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RVI-specific ACPI IDs
ACPI ID is used in the _HID (Hardware ID), _CID (Compatible ID) or
_SUB (Subsystem ID) objects as described in the ACPI Specification for
devices, that do not have a standard enumeration mechanism. The ACPI ID
consists of two parts: a vendor identifier followed by a product identifier.
Vendor IDs consist of 4 characters, each character being either an
uppercase letter (A-Z) or a numeral (0-9). The vendor ID SHOULD be
unique across the Industry and registered by the UEFI forum. For RVI
standard devices, RSCV is the vendor ID registered. Vendor-specific
devices can use an appropriate vendor ID registered for the manufacturer.
Product IDs are always four-character hexadecimal numbers (0-9 and A-F). The device manufacturer is responsible for assigning this identifier to each product model.
This document contains the canonical list of ACPI IDs for the namespace devices that adhere to the RVI specifications. The RVI task groups may make pull requests against this repository to request the allocation of ACPI ID for any new device.
| ACPI ID | Device |
|---|---|
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RISC-V Platform-Level Interrupt Controller (PLIC) |
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RISC-V Advanced Platform-Level Interrupt Controller (APLIC) |
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NS16550 UART compatible with an SPCR definition using |
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RISC-V IOMMU implemented as a platform device |
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RISC-V SBI Message Proxy (MPXY) Mailbox Controller |
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RISC-V RPMI System MSI Interrupt Controller |
Also see ACPI Device Properties for UART Devices. |
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RVI-specific ACPI Device Properties
This section is used to define the _DSD device properties [20] in the rscv- namespace.
Where explicit values are provided in a property definition, only these values must be used. System behavior with any other values is undefined.
| Property | Type | Description |
|---|---|---|
Currently, there are no properties defined in the |
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ACPI Device Properties for UART Devices
Generic 16550-compatible UART devices can have device properties in the global name space since Operating Systems are already using them.
| Property | Type | Description |
|---|---|---|
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Integer |
Clock feeding the IP block in Hz. |
A value of zero will preclude the ability to set the baud rate, or to configure a disabled device. |
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Integer |
Offset to apply to the register map base address from the start of the registers. |
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Integer |
Quantity to shift the register offsets by. |
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Integer |
The size (in bytes) of the register accesses that should be performed on the device. |
1, 2, 4 or 8. |
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Integer |
The FIFO size (in bytes). |