4.1. Service Groups
An RPMI service group is a collection of RPMI services that are logically grouped based on functionality. For example, all the voltage related services are grouped into a voltage service group. The functionality implemented by certain RPMI service groups may impact the architectural state of application processors due to this each RPMI service group specifies the RISC-V privilege levels of the application processor which can be access it. For example, the clock service groups can be accessed from M-mode and S-mode but the HSM service group can be only accessed from M-mode.
All RPMI service groups except the BASE service group are optional. If
the BASE_PROBE_SERVICE_GROUP service indicates that a service group is
implemented then the RPMI service group version must conform to the RPMI
specification version returned by the BASE_GET_SPEC_VERSION service.
All implemented RPMI service groups must satisfy the following requirements:
-
The RPMI service group must be accessible from the RISC-V privilege level associated with the RPMI context which includes it.
-
All RPMI services of the RPMI service groups must be supported except the dedicated notification service (
SERVICE_ID = 0x00) which is reserved for RPMI notification messages. A RPMI service group may implement its RPMI services partially only if it also defines a mechanism to discover supported RPMI services. -
The RPMI service group must implement a dedicated RPMI service with
SERVICE_ID = 0x01to subscribe for event notifications.
| The RPMI services listed within each RPMI service group do not have a specific order. Additionally, the sequence in which services are defined in the specification does not necessarily reflect the order in which they should be invoked. |
This specification defines standard RPMI service groups and RPMI services with the provision to add more service groups as required in the future. The RPMI specification also provides experimental service group IDs space for development of service group until a standard service group ID is allocated. The platform vendors can provide implementation specific RPMI service groups. The Table 1 table below lists all standard RPMI service groups defined by this specification.
| Service Group ID | RPMI Version (Major:Minor) | Service Group Name | Allowed RISC-V Privilege Levels on Application Processors |
|---|---|---|---|
0x0001 |
1.0 |
BASE |
M-mode, S-mode |
0x0002 |
1.0 |
SYSTEM_MSI |
M-mode, S-mode |
0x0003 |
1.0 |
SYSTEM_RESET |
M-mode |
0x0004 |
1.0 |
SYSTEM_SUSPEND |
M-mode |
0x0005 |
1.0 |
HART_STATE_MANAGEMENT |
M-mode |
0x0006 |
1.0 |
CPPC |
M-mode, S-mode |
0x0007 |
1.0 |
VOLTAGE |
M-mode, S-mode |
0x0008 |
1.0 |
CLOCK |
M-mode, S-mode |
0x0009 |
1.0 |
DEVICE_POWER |
M-mode, S-mode |
0x000A |
1.0 |
PERFORMANCE |
M-mode, S-mode |
0x000B |
1.0 |
MANAGEMENT_MODE |
M-mode, S-mode |
0x000C |
1.0 |
RAS_AGENT |
M-mode, S-mode |
0x000D |
1.0 |
REQUEST_FORWARD |
M-mode, S-mode |
0x000E - 0x7BFF |
Reserved for Future Use |
||
0x7C00 - 0x7FFF |
Experimental Service Groups |
||
0x8000 - 0xFFFF |
Implementation Specific Service Groups |
Service Group: BASE (SERVICEGROUP_ID: 0x0001)
The BASE service group is mandatory and provides the following services:
-
Initial handshaking between the application processor and the platform microcontroller.
-
Discovering the RPMI implementation version information.
-
Discovering the implementation of a service group.
-
Discovering platform specific information.
The following table lists the services in the BASE service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
BASE_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
BASE_GET_IMPLEMENTATION_VERSION |
NORMAL_REQUEST |
0x03 |
BASE_GET_IMPLEMENTATION_ID |
NORMAL_REQUEST |
0x04 |
BASE_GET_SPEC_VERSION |
NORMAL_REQUEST |
0x05 |
BASE_GET_PLATFORM_INFO |
NORMAL_REQUEST |
0x06 |
BASE_PROBE_SERVICE_GROUP |
NORMAL_REQUEST |
0x07 |
BASE_GET_ATTRIBUTES |
NORMAL_REQUEST |
RPMI Implementation IDs
The RPMI specification defines space for standard implementation IDs and for experimental implementation IDs. The experimental implementation IDs can be used by the implementations until a standard implementation ID is assigned to it.
The RPMI implementations that have been assigned a standard implementation ID are listed in the table below.
| Implementation ID | Name |
|---|---|
0x00000000 |
libRPMI [2] |
0x00000001 - 0x7FFFFFFF |
Reserved for Future Use |
0x80000000 - 0xFFFFFFFF |
Experimental Implementation IDs |
Notifications
This service is used by the platform microcontroller to send the asynchronous message of type notification to the application processor. The message transfers the events defined by this service group. The events defined are listed in the below table.
| Event ID | Event Name | Event Data | Description |
|---|---|---|---|
0x01 |
REQUEST_HANDLE_ERROR |
NA |
This event indicates that the platform microcontroller is unable to serve the message requests and acknowledgements are not guaranteed. |
Service: BASE_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to BASE
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: BASE_GET_IMPLEMENTATION_VERSION (SERVICE_ID: 0x02)
This service is used to get the RPMI implementation version of the platform
microcontroller. The version returned is a 32-bit composite number containing
the MAJOR and MINOR version numbers.
| NA |
|---|
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
IMPL_VERSION |
uint32 |
Implementation version.
|
Service: BASE_GET_IMPLEMENTATION_ID (SERVICE_ID: 0x03)
This service is used to get a 32-bit RPMI implementation ID assigned to the software that implements the RPMI specification. Every implementation ID is unique and listed in the Table 5.
| NA |
|---|
| Word | Name | Type | Description | ||||
|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||
1 |
IMPL_ID |
uint32 |
Implementation ID. |
Service: BASE_GET_SPEC_VERSION (SERVICE_ID: 0x04)
This service is used to get the implemented RPMI specification version. The
version returned is a 32-bit composite number containing the MAJOR and
MINOR version numbers.
| NA |
|---|
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
SPEC_VERSION |
uint32 |
RPMI specification version.
|
Service: BASE_GET_PLATFORM_INFO (SERVICE_ID: 0x05)
This service is used to get additional platform information if available.
| NA |
|---|
| Word | Name | Type | Description | ||||
|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||
1 |
PLATFORM_ID_LEN |
uint32 |
Platform Identifier field length in bytes. |
||||
2 |
PLATFORM_ID |
uint8[ |
Platform Identifier. |
Service: BASE_PROBE_SERVICE_GROUP (SERVICE_ID: 0x06)
This service is used to probe the implementation of a service group and to
obtain the implemented service group version. The service group version is a
32-bit composite number containing the MAJOR and MINOR numbers.
If the service group is successfully probed then the implemented service group
version is returned in the SERVICE_GROUP_VERSION field. Otherwise it returns
0.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
SERVICEGROUP_ID |
uint32 |
Service group ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
SERVICE_GROUP_VERSION |
uint32 |
Service group version.
|
Service: BASE_GET_ATTRIBUTES (SERVICE_ID: 0x07)
This service is used to discover additional features supported by the BASE service group.
| NA |
|---|
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
FLAGS0 |
uint32 |
|
||||||||
2 |
FLAGS1 |
uint32 |
Reserved and must be |
||||||||
3 |
FLAGS2 |
uint32 |
Reserved and must be |
||||||||
4 |
FLAGS3 |
uint32 |
Reserved and must be |
Service Group - SYSTEM_MSI (SERVICEGROUP_ID: 0x0002)
The SYSTEM_MSI service group defines services to allow application processors to receive MSIs upon system events such as P2A doorbell, graceful shutdown/reboot request, CPU hotplug event, memory hotplug event, etc.
The number of system MSIs supported by this service group is fixed and referred
to as SYS_NUM_MSI. Each system MSI is associated with a unique index which is
also referred to as SYS_MSI_INDEX where 0 <= SYS_MSI_INDEX < SYS_NUM_MSI.
The association between system events and system MSI index (aka SYS_MSI_INDEX)
is platform specific and must be discovered using hardware description mechanisms
such as device tree or ACPI.
The system MSI state is 32-bit word also referred to as SYS_MSI_STATE which
includes whether the system MSI is enabled/disabled and whether system MSI is
currently pending at the platform microcontroller. The Table 19
below shows the encoding of SYS_MSI_STATE.
| A system MSI can be pending for several reasons. For example, if the MSI target address and data are not configured, or if the configured MSI target address is not valid. |
| Bits | Permission | Description |
|---|---|---|
[31:2] |
NA |
Reserved and must be |
[1] |
Read-Only |
MSI pending state. |
[0] |
Read-Write |
MSI enable state. |
The platform microcontroller can only send a pending system MSI if it is
enabled and the configured with a valid MSI target address. The system MSI
can be enabled/disabled using the SYSMSI_SET_MSI_STATE service whereas the
system MSI target configuration can be done using the SYSMSI_SET_MSI_TARGET
service.
If the system MSI target address is IMSIC, then the application
processors will directly receive the system MSI whereas if the system
MSI target address is setipnum register of a APLIC domain then the
application processors receive it as wired interrupt.
|
The Table 20 below lists the services in the SYSTEM_MSI service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
SYSMSI_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
SYSMSI_GET_ATTRIBUTES |
NORMAL_REQUEST |
0x03 |
SYSMSI_GET_MSI_ATTRIBUTES |
NORMAL_REQUEST |
0x04 |
SYSMSI_SET_MSI_STATE |
NORMAL_REQUEST |
0x05 |
SYSMSI_GET_MSI_STATE |
NORMAL_REQUEST |
0x06 |
SYSMSI_SET_MSI_TARGET |
NORMAL_REQUEST |
0x07 |
SYSMSI_GET_MSI_TARGET |
NORMAL_REQUEST |
Service: SYSMSI_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to SYSTEM_MSI
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: SYSMSI_GET_ATTRIBUTES (SERVICE_ID: 0x02)
This service is used to discover attributes of the system MSI service group.
| NA |
|---|
| Word | Name | Type | Description | ||||
|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||
1 |
SYS_NUM_MSI |
uint32 |
Number of system MSIs. |
||||
2 |
FLAGS0 |
uint32 |
Reserved and must be |
||||
3 |
FLAGS1 |
uint32 |
Reserved and must be |
Service: SYSMSI_GET_MSI_ATTRIBUTES (SERVICE_ID: 0x03)
This service is used to discover attributes of a particular system MSI.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
SYS_MSI_INDEX |
uint32 |
Index of the system MSI. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS0 |
uint32 |
|
||||||
2 |
FLAGS1 |
uint32 |
Reserved and must be |
||||||
3:6 |
SYS_MSI_NAME |
uint8[16] |
System MSI name, a NULL-terminated ASCII string up to 16-bytes. |
Service: SYSMSI_SET_MSI_STATE (SERVICE_ID: 0x04)
This service is used to update the state of a system MSI. Specifically, it allows application processors to enable or disable a system MSI. The read-only bits of the system MSI state are not updated by this service.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
SYS_MSI_INDEX |
uint32 |
Index of the system MSI. |
1 |
SYS_MSI_STATE |
uint32 |
System MSI state as defined in Table 19. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: SYSMSI_GET_MSI_STATE (SERVICE_ID: 0x05)
This service is used to get the current state of a system MSI.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
SYS_MSI_INDEX |
uint32 |
Index of the system MSI. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
SYS_MSI_STATE |
uint32 |
System MSI state as defined in Table 19. |
Service: SYSMSI_SET_MSI_TARGET (SERVICE_ID: 0x06)
This service is used to configure the target address and data of a system MSI.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
SYS_MSI_INDEX |
uint32 |
Index of the system MSI. |
1 |
SYS_MSI_ADDRESS_LOW |
uint32 |
Lower 32-bit of the MSI address. |
2 |
SYS_MSI_ADDRESS_HIGH |
uint32 |
Upper 32-bit of the MSI address. |
3 |
SYS_MSI_DATA |
uint32 |
32-bit MSI data. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: SYSMSI_GET_MSI_TARGET (SERVICE_ID: 0x07)
This service is used to get the current target address and data of a system MSI.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
SYS_MSI_INDEX |
uint32 |
Index of the system MSI. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
SYS_MSI_ADDRESS_LOW |
uint32 |
Lower 32-bit of the MSI address. |
||||||
2 |
SYS_MSI_ADDRESS_HIGH |
uint32 |
Upper 32-bit of the MSI address. |
||||||
3 |
SYS_MSI_DATA |
uint32 |
32-bit MSI data. |
Service Group - SYSTEM_RESET (SERVICEGROUP_ID: 0x0003)
This service group defines services for system-level reset or shutdown.
The architectural reset types that are supported by default are System Cold Reset and System Shutdown.
System Cold Reset, also known as power-on-reset, involves power cycling the entire system. Upon a successful system cold reset, all devices undergo power cycling in an implementation-defined sequence similar to the initial power-on sequence of the system.
System Shutdown results in all components/devices in the system losing power. Currently, the application processor is the only entity that can request the system shutdown, which means that for the platform microcontroller, it is not necessary to categorize it as a graceful or forceful shutdown. In the case of a shutdown request, it is implicit for the platform microcontroller that the application processor has prepared itself for a successful shutdown.
The following table lists the services in the SYSTEM_RESET service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
SYSRST_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
SYSRST_GET_ATTRIBUTES |
NORMAL_REQUEST |
0x03 |
SYSRST_RESET |
POSTED_REQUEST |
Reset Types
RPMI supports reset types and their values as defined by SBI specification.
Refer to SRST System Reset Types
in the RISC-V SBI Specification [1] for the RESET_TYPE.
Service: SYSRST_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to SYSTEM_RESET
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: SYSRST_GET_ATTRIBUTES (SERVICE_ID: 0x02)
This service is used to discover the attributes of a reset type. The attribute
flags indicates if a RESET_TYPE is supported or not apart from the
System Shutdown and System Cold Reset which are mandatory and supported by
default. System Warm Reset support can be discovered with this service.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
RESET_TYPE |
uint32 |
Reset type. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS |
uint32 |
Reset type attributes.
|
Service: SYSRST_RESET (SERVICE_ID: 0x03)
This service is used to initiate the system reset or system shutdown.
The application processor must only request supported reset types, discovered
using the SYSRST_GET_ATTRIBUTES service except for System Shutdown and System
Cold Reset which are supported by default. This service does not return a response.
If an invalid reset type is provided, the reset request is ignored. If the
system reset fails, the resulting system state is unspecified.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
RESET_TYPE |
uint32 |
Reset type. |
| NA |
|---|
Service Group - SYSTEM_SUSPEND (SERVICEGROUP_ID: 0x0004)
This service group defines services used to request platform microcontroller
to transition the system into a suspend state, also called a sleep state.
The suspend state SUSPEND_TO_RAM is supported by default by the platform and
if the application processor requests for SUSPEND_TO_RAM, it’s implicit for the
platform microcontroller that all the application processors except the one
requesting are in STOPPED state and necessary state saving in the RAM has
been complete.
The following table lists the services in the SYSTEM_SUSPEND service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
SYSSUSP_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
SYSSUSP_GET_ATTRIBUTES |
NORMAL_REQUEST |
0x03 |
SYSSUSP_SUSPEND |
NORMAL_REQUEST |
Suspend Types
RPMI supports suspend types and their values as defined by SBI
specification.
Refer to SBI System Sleep Types
in the RISC-V SBI Specification [1] for the SUSPEND_TYPE definition.
Service: SYSSUSP_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to SYSTEM_SUSPEND
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: SYSSUSP_GET_ATTRIBUTES (SERVICE_ID: 0x02)
This service is used to discover the attributes of a suspend type. The
attribute flags for a suspend type indicate whether a SUSPEND_TYPE is
supported. Additionally, the flags specify whether a SUSPEND_TYPE supports
a resume address.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
SUSPEND_TYPE |
uint32 |
Suspend type. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
FLAGS |
uint32 |
Suspend type attributes.
|
Service: SYSSUSP_SUSPEND (SERVICE_ID: 0x03)
This service is used to request the platform microcontroller to transition the
system in a suspend state. This service returns successfully when the platform
microcontroller accepts the system suspend request. The application processor
which called this service must then enter into a quiesced state such as WFI. The
platform microcontroller will transition the system to the requested
SUSPEND_TYPE upon the successful transition of the application processor into
the supported quiesced state. The mechanism for detecting the quiesced state of
the application processor is platform specific.
The application processor must only request supported suspend types, discovered
using the SYSSUSP_GET_ATTRIBUTES service.
If a suspend type does not support the custom resume address that the
application processor can discover through the SYSSUSP_GET_ATTRIBUTES service
then the RESUME_ADDR_LOW and RESUME_ADDR_HIGH will be ignored and the
application processor will resume from the pc (program counter) after the
instruction that put the application processor in the quiesced state,
such as the WFI instruction.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
HART_ID |
uint32 |
Hart ID of the calling hart. |
1 |
SUSPEND_TYPE |
uint32 |
Suspend type. |
2 |
RESUME_ADDR_LOW |
uint32 |
Lower 32-bit address. |
3 |
RESUME_ADDR_HIGH |
uint32 |
Upper 32-bit address. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service Group - HART_STATE_MANAGEMENT (SERVICEGROUP_ID: 0x0005)
This service group defines services to control and manage the application
processor (hart) power states. Hart power states include power on, power off,
suspend modes, etc. A hart is identified by a 32-bit identifier called HART_ID.
In a platform, depending on the sharing of power controls and common resources, the harts can be grouped in a hierarchical topology to form cores, clusters, nodes, etc. In such cases the power state change for a hart can affect the entire hierarchical group in which the hart is located, requiring coordination for the power state change. RPMI supports the coordination mechanisms and hart power states defined by the RISC-V SBI Specification [1].
The following table lists the services in the HART_STATE_MANAGEMENT service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
HSM_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
HSM_GET_HART_STATUS |
NORMAL_REQUEST |
0x03 |
HSM_GET_HART_LIST |
NORMAL_REQUEST |
0x04 |
HSM_GET_SUSPEND_TYPES |
NORMAL_REQUEST |
0x05 |
HSM_GET_SUSPEND_INFO |
NORMAL_REQUEST |
0x06 |
HSM_HART_START |
NORMAL_REQUEST |
0x07 |
HSM_HART_STOP |
NORMAL_REQUEST |
0x08 |
HSM_HART_SUSPEND |
NORMAL_REQUEST |
Hart States
Hart HSM states and the HSM state machine supported by the RPMI are defined in the RISC-V SBI Specification [1]. Refer to HSM States.
From a hart perspective a start state means hart has started execution of instructions and stop state means that hart is not executing the instructions. The platform can implement the stop state either by powering down the hart or just putting the hart in a platform supported low-power state.
Hart Suspend Types
The RPMI supports the hart suspend types encoding as defined in RISC-V SBI Specification [1]. Refer to HSM Suspend Types. The values for the platform supported suspend types are discovered through a service defined in this service group.
Service: HSM_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to HART_STATE_MANAGEMENT
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: HSM_GET_HART_STATUS (SERVICE_ID: 0x02)
This service returns the current HSM state of a hart. If a hart is in an
invalid state that is not a defined HSM state, an error code will be set
in the STATUS field.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
HART_ID |
uint32 |
Hart ID. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
HART_STATE |
uint32 |
Hart state. |
Service: HSM_GET_HART_LIST (SERVICE_ID: 0x03)
This service retrieves the list of Hart IDs managed by this service group.
If the number of words required for all available Hart IDs exceeds the number of
words that can be returned in one acknowledgement message then the platform
microcontroller will set the REMAINING and RETURNED fields accordingly and
only return the Hart IDs which can be accommodated. The application processor
may need to call this service again with the appropriate START_INDEX until the
REMAINING field returns 0.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
START_INDEX |
uint32 |
Start index of the Hart ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
REMAINING |
uint32 |
Remaining number of Hart IDs to be returned. |
||||||
2 |
RETURNED |
uint32 |
Number of Hart IDs returned in this request. |
||||||
3 |
HART_ID[N] |
uint32 |
Hart IDs list. |
Service: HSM_GET_SUSPEND_TYPES (SERVICE_ID: 0x04)
This service gets the list of all supported suspend types for a hart. The suspend types in the list must be ordered based on increasing power savings.
If the number of words required for all available suspend types exceeds the
number of words that can be returned in one acknowledgement message then the
platform microcontroller will set the REMAINING and RETURNED fields
accordingly and only return the suspend types which can be accommodated.
The application processor may need to call this service again with the
appropriate START_INDEX until the REMAINING field returns 0.
The attributes and details of each suspend type can be discovered using the
HSM_GET_SUSPEND_INFO service.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
START_INDEX |
uint32 |
Start index of the Hart ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
REMAINING |
uint32 |
Remaining number of suspend types to be returned. |
||||||
2 |
RETURNED |
uint32 |
Number of suspend types returned in this request. |
||||||
3 |
SUSPEND_TYPE[N] |
uint32 |
Suspend types. |
Service: HSM_GET_SUSPEND_INFO (SERVICE_ID: 0x05)
This service is used to get the attributes of a suspend type. The attributes of a suspend type include various associated latencies. The entry latency for a suspend type is the maximum amount of time that the hart requires to transition from the execution state to the low-power suspend state when the hart invokes an quiesced state entry mechanism such as WFI. The exit latency is the time required by the hart to transition from the suspend state to execution state after the wakeup event.
For each suspend state there is a point of no return after which the suspend
state transition cannot be reversed. The wakeup latency is the maximum time
required by the hart to transition from the point of no return to the execution
state. If the platform returns 0 in WAKEUP_LATENCY then the application
processor can use the (ENTRY_LATENCY + EXIT_LATENCY) as the wakeup latency.
The minimum residency of a suspend state is the minimum time the application processor must remain in that suspend state to become energy efficient compared to the shallower suspend state.
| The energy is also consumed while entering and exiting a suspend state. The application processor must spend time equal to or more than minimum residency to justify the energy cost of entering and exiting that suspend state. |
| The application processor entering into a deeper suspend state with a high minimum residency will incur a longer wakeup latency due to more time required to exit that suspend state. If the predicted idle time by the application processor is less than the minimum residency of a suspend state, it should select the shallower suspend state to minimize the wakeup latency to achieve energy savings. |
| Word | Name | Type | Description |
|---|---|---|---|
0 |
SUSPEND_TYPE |
uint32 |
Suspend type. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS |
uint32 |
|
||||||
2 |
ENTRY_LATENCY |
uint32 |
Entry latency in microseconds. |
||||||
3 |
EXIT_LATENCY |
uint32 |
Exit latency in microseconds. |
||||||
4 |
WAKEUP_LATENCY |
uint32 |
Wakeup latency in microseconds. |
||||||
5 |
MIN_RESIDENCY |
uint32 |
Minimum residency time in microseconds. |
Service: HSM_HART_START (SERVICE_ID: 0x06)
This service is used to start the execution on a hart identified by HART_ID.
This service requires a start address which is the physical address from which
the target hart will start execution. Successful completion of this service means
that the hart has started execution from the specified start address.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
HART_ID |
uint32 |
Hart ID of the target hart to be started. |
1 |
START_ADDR_LOW |
uint32 |
Lower 32-bit of the start address. |
2 |
START_ADDR_HIGH |
uint32 |
Upper 32-bit of the start address. |
| Word | Name | Type | Description | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: HSM_HART_STOP (SERVICE_ID: 0x07)
This service stops the execution on the calling hart. The mechanism for stopping the hart is platform specific. The hart can be powered down, if supported, or put into the deepest available sleep state.
This service returns successful if the platform microcontroller has successfully acknowledged that the target hart can be stopped. The hart upon successful acknowledgement can perform the final context saving if required and must enter into a quiesced state such as WFI which can be detected and allow the platform microcontroller to proceed to stop the hart. The mechanism to detect the hart quiesced state by the platform microcontroller is platform specific.
Once the hart is stopped, it can only be restarted by explicitly invoking the
HSM_HART_START service call explicitly by any other hart.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
HART_ID |
uint32 |
Hart ID of the calling hart. |
| Word | Name | Type | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: HSM_HART_SUSPEND (SERVICE_ID: 0x08)
This service is used to put a hart in a low-power suspend state supported by the
platform. Each suspend type is a 32-bit value which is discovered through the
HSM_GET_SUSPEND_TYPES service.
This service returns successful if the platform microcontroller has successfully
acknowledged that the target hart can be put into the requested SUSPEND_TYPE
state. The target hart after the successful acknowledgement must enter into a
quiesced state such as WFI which can be detected and allow the platform
microcontroller complete the suspend state transition. The mechanism to detect
the hart quiesced state by the platform microcontroller is platform specific.
For non-retentive suspend state the hart will resume its execution from the provided resume address.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
HART_ID |
uint32 |
Hart ID of the calling hart. |
1 |
SUSPEND_TYPE |
uint32 |
Suspend type. |
2 |
RESUME_ADDR_LOW |
uint32 |
Lower 32-bit of the resume address. |
3 |
RESUME_ADDR_HIGH |
uint32 |
Upper 32-bit of the resume address. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service Group - CPPC (SERVICEGROUP_ID: 0x0006)
This service group defines the services to control application processor performance by managing a set of registers per application processor that are used for performance management and control. The ACPI CPPC (Collaborative Processor Performance Control) is an abstract and flexible mechanism that allows application processor to collaborate with the platform microcontroller to control the performance.
The CPPC extension defined in the RISC-V SBI specification [1] defines the register IDs for the standard CPPC registers, along with additional registers also required by the application processor.
The ACPI CPPC specification [3] provides the details of the CPPC registers and also provides details on the performance control mechanism through CPPC.
This service group works with the abstract performance scale defined by the ACPI CPPC and is managed by the platform which is responsible for the conversion between the abstract performance level and the internal performance operating point.
The platform may have multiple application processors that share the actual performance controls like clock, voltage regulator and others depending on the platform. In such cases a performance level change for one application processor will affect the entire the group sharing the controls. Its the responsibility of the power and performance management software running on the application processor and the platform to coordinate and manage the group level performance changes.
The following table lists the services in the CPPC service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
CPPC_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
CPPC_PROBE_REG |
NORMAL_REQUEST |
0x03 |
CPPC_READ_REG |
NORMAL_REQUEST |
0x04 |
CPPC_WRITE_REG |
NORMAL_REQUEST |
0x05 |
CPPC_GET_FAST_CHANNEL_REGION |
NORMAL_REQUEST |
0x06 |
CPPC_GET_FAST_CHANNEL_OFFSET |
NORMAL_REQUEST |
0x07 |
CPPC_GET_HART_LIST |
NORMAL_REQUEST |
CPPC Fast-channel
The CPPC service group defines the fast-channels to be used by the application processor to request performance changes and to obtain performance change feedback for an application processor from the platform microcontroller.
A fast-channel shared memory layout is specific to the CPPC service group. The data written in a fast-channel do not follow the conventional RPMI message format. The simple data format supported by the fast-channel allows faster processing of the performance change requests made through a fast-channel and faster read of the performance feedback values supported over the fast-channel.
The CPPC service group defines two types of fast-channel for each application processor. If fast-channels are supported then each application processor must be assigned both types fast-channel.
Performance Request Fast-channel
In this fast-channel the application processor will either write
the desired performance level in case of normal mode or the minimum
and maximum performance level in case of Autonomous (CPPC2) mode in the
fast-channel. Otherwise the application processor can call the service
CPPC_WRITE_REG for the DesiredPerformanceRegister or
MinimumPerformanceRegister and MaximumPerformanceRegister.
The supported values in this fast-channel which depends on the CPPC mode, either
normal or autonomous mode is discoverable through CPPC_GET_FAST_CHANNEL_REGION
service.
The size of this fast-channel type is 8 bytes.
| CPPC Mode | Layout | ||||||
|---|---|---|---|---|---|---|---|
Normal Mode |
|
||||||
Autonomous (CPPC2) mode |
|
Performance Feedback Fast-channel
In this fast-channel the application processor will read the supported value for estimating the delivered performance as performance feedback for an application processor. The application processor current frequency (Hz) is used for performance feedback in this fast-channel. The platform microcontroller must write the frequency of an application processor in the fast-channel whenever it changes.
The size of this fast-channel type is 8 bytes.
| Offset | Value (32-bit) |
|---|---|
0x0 |
Current frequency low 32-bit (Hz). |
0x4 |
Current frequency high 32-bit (Hz). |
CPPC Fast-channel Shared Memory Region
The size of the shared memory region containing all the fast-channels for all the
managed application processors must be a power-of-2. The base-address and size
(bytes) of this shared memory region can be discovered using the
service CPPC_GET_FAST_CHANNEL_REGION. The base-address of the shared memory
region must be aligned to 8 bytes which is maximum size of a fast-channel in
both the types.
The offsets of fast-channels of both types for an application processor are
aligned to 8 bytes. The offset of both fast-channel types in the shared memory
region can be discovered through service CPPC_GET_FAST_CHANNEL_OFFSET. The
offsets discovered can be added to the base-address of the shared memory
region to form the address of Performance Request fast-channel and Performance
Feedback fast-channel for an application processor.
Performance Request Fast-channel Doorbell
A doorbell can also be supported for this fast-channel type which is shared
between all the application processors. The doorbell, if supported must be a
memory mapped register with write access.
The doorbell details and attributes such as doorbell register address, doorbell
write value can be discovered by the application processor through the
CPPC_GET_FAST_CHANNEL_REGION service.
The doorbell register address is the physical address of the register. The doorbell write value is the value which must be written in the doorbell register to trigger the doorbell interrupt.
The width of the doorbell write value must be equal to the doorbell register width.
| The write value may also contains other set bits which must persist on every write to the doorbell register. |
Service: CPPC_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to CPPC
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: CPPC_PROBE_REG (SERVICE_ID: 0x02)
This service is used to probe a CPPC register implementation status for a
application processor. If the CPPC register reg_id is implemented then
the length in bits is returned in REG_LENGTH field. If the register is not
supported or invalid then the REG_LENGTH will be 0.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
REG_ID |
uint32 |
CPPC register ID. |
1 |
HART_ID |
uint32 |
Hart ID. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
REG_LENGTH |
uint32 |
Register length (bits). |
Service: CPPC_READ_REG (SERVICE_ID: 0x03)
This service is used to read a CPPC register. If the fast-channels are
supported, a read of the DesiredPerformanceRegister or
MinimumPerformanceRegister and MaximumPerformanceRegister through this
service will return the current desired performance level or
minimum and maximum performance level limit depending on the CPPC mode from the
fast-channel of a application processor.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
REG_ID |
uint32 |
CPPC register ID. |
1 |
HART_ID |
uint32 |
Hart ID. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
DATA_LOW |
uint32 |
Lower 32-bit of the data. |
||||||||
2 |
DATA_HIGH |
uint32 |
Upper 32-bit of data. This will be |
Service: CPPC_WRITE_REG (SERVICE_ID: 0x04)
This service is used to write a CPPC register.
If the fast-channels are supported the application processor must only write
desired performance level in the fast-channel instead of writing into the
DesiredPerformanceRegister through this service. Similarly, in case of the
autonomous mode the application processor must write minimum and maximum limit
levels into the fast-channel instead of calling this service for
MinimumPerformanceRegister and MaximumPerformanceRegister. Otherwise the
writes to these registers may be ignored.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
REG_ID |
uint32 |
CPPC register ID. |
1 |
HART_ID |
uint32 |
Hart ID. |
2 |
DATA_LOW |
uint32 |
Lower 32-bit of data. |
3 |
DATA_HIGH |
uint32 |
Upper 32-bit of data. This is ignored if the register is of 32-bit length. |
| Word | Name | Type | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: CPPC_GET_FAST_CHANNEL_REGION (SERVICE_ID: 0x05)
This service is used to get the details of the shared memory region containing all the fast-channels, attributes of the fast-channel and the details of the doorbell if supported.
The doorbell details are unspecified and considered invalid if the Performance
Request fast-channel doorbell (FLAGS[0] = 0) is not supported and must not be
used.
| NA |
|---|
| Word | Name | Type | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||||
1 |
FLAGS |
uint32 |
|
||||||||||
2 |
REGION_ADDR_LOW |
uint32 |
Lower 32-bit of the fast-channels shared memory region physical address. |
||||||||||
3 |
REGION_ADDR_HIGH |
uint32 |
Upper 32-bit of the fast-channels shared memory region physical address. |
||||||||||
4 |
REGION_SIZE_LOW |
uint32 |
Lower 32-bit of the fast-channels shared memory region size. |
||||||||||
5 |
REGION_SIZE_HIGH |
uint32 |
Upper 32-bit of the fast-channels shared memory region size. |
||||||||||
6 |
DB_ADDR_LOW |
uint32 |
Lower 32-bit of doorbell register address for Performance Request fast-channel. |
||||||||||
7 |
DB_ADDR_HIGH |
uint32 |
Upper 32-bit of doorbell register address for Performance Request fast-channel. |
||||||||||
8 |
DB_WRITE_VALUE |
uint32 |
32-bit doorbell write value for Performance Request fast-channel. |
Service: CPPC_GET_FAST_CHANNEL_OFFSET (SERVICE_ID: 0x06)
This service is used to get the offsets of Performance Request fast-channel and Performance Feedback fast-channel for an application processor in the shared memory region containing all the fast-channels.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
HART_ID |
uint32 |
Hart ID. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
PERF_REQUEST_OFFSET_LOW |
uint32 |
Lower 32-bit of a Performance Request fast-channel offset. |
||||||||
2 |
PERF_REQUEST_OFFSET_HIGH |
uint32 |
Upper 32-bit of a Performance Request fast-channel offset. |
||||||||
3 |
PERF_FEEDBACK_OFFSET_LOW |
uint32 |
Lower 32-bit of a Performance Feedback fast-channel offset. |
||||||||
4 |
PERF_FEEDBACK_OFFSET_HIGH |
uint32 |
Upper 32-bit of a Performance Feedback fast-channel offset. |
Service: CPPC_GET_HART_LIST (SERVICE_ID: 0x07)
This service retrieves the list of Hart IDs managed by this service group for performance control.
If the number of words required for all available Hart IDs exceeds the number of
words that can be returned in one acknowledgement message then the platform
microcontroller will set the REMAINING and RETURNED fields accordingly and
only return the Hart IDs which can be accommodated. The application processor
may need to call this service again with the appropriate START_INDEX until the
REMAINING field returns 0.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
START_INDEX |
uint32 |
Starting index of Hart ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
REMAINING |
uint32 |
Remaining number of Hart IDs to be returned. |
||||||
2 |
RETURNED |
uint32 |
Number of Hart IDs returned in this request. |
||||||
3 |
HART_ID[N] |
uint32 |
Hart IDs. |
Service Group - VOLTAGE (SERVICEGROUP_ID: 0x0007)
This service group is used to control the voltage level of the voltage domains.
A voltage domain is the logical grouping of one or more devices powered by a
single controllable voltage source. A system may have multiple voltage domains
and the services defined in this service group are used to manage and control the
voltage levels of these voltage domains. Each voltage domain is identified by
DOMAIN_ID which is a 32-bit integer starting from 0.
The following table lists the services in the VOLTAGE service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
VOLT_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
VOLT_GET_NUM_DOMAINS |
NORMAL_REQUEST |
0x03 |
VOLT_GET_ATTRIBUTES |
NORMAL_REQUEST |
0x04 |
VOLT_GET_SUPPORTED_LEVELS |
NORMAL_REQUEST |
0x05 |
VOLT_SET_CONFIG |
NORMAL_REQUEST |
0x06 |
VOLT_GET_CONFIG |
NORMAL_REQUEST |
0x07 |
VOLT_SET_LEVEL |
NORMAL_REQUEST |
0x08 |
VOLT_GET_LEVEL |
NORMAL_REQUEST |
Voltage Level Format
There are two types of voltage level formats supported in the VOLTAGE service group. The voltage levels are represented as a group.
Discrete Format
A set of discrete voltage levels arranged in a sequence, starting from the lowest value at the lowest index and increasing sequentially to higher levels. The following table shows the structure of the discrete format.
[voltage0, voltage1, voltage2, ... , voltage(N-1)]
where:
voltage0 < voltage1 < voltage2 < ... < voltage(N-1)| Word | Name | Description |
|---|---|---|
0 |
VOLTAGE |
Discrete voltage level in microvolts (uV). |
Linear Range Format
A linear range of voltage levels with a constant step size. The following table shows the structure of the linear range voltage format.
[voltage_min, voltage_max, voltage_step]Multi-linear range format can be supported by having multiple linear range tuple
arranged in an continuous array format.
[voltage_min0, voltage_max0, voltage_step0],
[voltage_min1, voltage_max1, voltage_step1],
...
[voltage_min(N-1), voltage_max(N-1), voltage_step(N-1)],The format must be packed sequentially such that voltage_max0 < voltage_min1,
voltage_max1 < voltage_min2 and so on.
Each linear range is considered as a single voltage level.
| Word | Name | Description |
|---|---|---|
0 |
VOLTAGE_MIN |
Lower boundary of voltage level in microvolts (uV). |
1 |
VOLTAGE_MAX |
Upper boundary of voltage level in microvolts (uV). |
2 |
STEP |
Step size in microvolts (uV). |
Service: VOLT_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to VOLTAGE
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: VOLT_GET_NUM_DOMAINS (SERVICE_ID: 0x02)
This service is used to query the number of voltage domains available in the system.
| NA |
|---|
| Word | Name | Type | Description | ||||
|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||
1 |
NUM_DOMAINS |
uint32 |
Number of voltage domains. |
Service: VOLT_GET_ATTRIBUTES (SERVICE_ID: 0x03)
Each domain may support multiple voltage levels, which are permitted by the domain
for operation. The number of levels indicates the total count of voltage levels
supported within a voltage domain. Transition latency denotes the maximum time
required for the voltage to stabilize upon a change in the regulator. The FLAGS
field encodes the voltage format supported by the hardware, including discrete
and linear range formats." The NUM_LEVELS field returns the number of discrete
voltage in case discrete format and number of linear range tuple in linear range
voltage format. Each domain can support only one voltage level format. Additional
voltage formats can be accommodated in the future if required.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Voltage domain ID. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
FLAGS |
uint32 |
|
||||||||
2 |
NUM_LEVELS |
uint32 |
The number of voltage levels (number of arrays) supported by the domain. If the voltage level format is a linear range, then each linear range is considered a single voltage level. |
||||||||
3 |
TRANS_LATENCY |
uint32 |
Transition latency, in microsecond (us). |
||||||||
4:7 |
DOMAIN_NAME |
uint8[16] |
Voltage domain name, a NULL-terminated ASCII string up to 16-bytes. |
Service: VOLT_GET_SUPPORTED_LEVELS (SERVICE_ID: 0x04)
Each domain may support multiple voltage levels which are allowed by the domain to operate. The number of voltage levels returned depends on the format of the voltage level.
The total number of words required to represent the voltage levels in one message
cannot exceed the total words available in one message DATA field. If the number
of levels exceeds this limit, the platform microcontroller will return the maximum
number of levels that can be accommodated in one message and adjust the REMAINING
field accordingly. When the REMAINING field is not zero, the application processor
must make subsequent service calls with the appropriate VOLTAGE_LEVEL_INDEX set
to retrieve the remaining voltage levels. It is possible that multiple service
calls may be necessary to retrieve all the voltage levels.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Voltage domain ID. |
1 |
VOLTAGE_LEVEL_INDEX |
uint32 |
The index of discrete voltage if the format is discrete, or index of linear range tuple if the format is linear range. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
FLAGS |
uint32 |
Reserved and must be |
||||||||
2 |
REMAINING |
uint32 |
The remaining number of discrete voltage if the format is discrete type, or number of linear range tuple if the format is linear range. |
||||||||
3 |
RETURNED |
uint32 |
The number of discrete voltage levels returned if the format is discrete type, or the number of linear range tuple if the format is linear range. |
||||||||
4 |
VOLTAGE_LEVEL[] |
uint32[] |
Voltage levels. |
Service: VOLT_SET_CONFIG (SERVICE_ID: 0x05)
This service is used to configure a voltage domain.
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Voltage domain ID. |
||||||
1 |
CONFIG |
uint32 |
Voltage domain config.
|
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: VOLT_GET_CONFIG (SERVICE_ID: 0x06)
This service is used to get the configuration of a voltage domain.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Voltage domain ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
CONFIG |
uint32 |
Voltage domain config.
|
Service: VOLT_SET_LEVEL (SERVICE_ID: 0x07)
This service is used to set the voltage level in microvolts of a voltage domain.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Voltage domain ID. |
1 |
VOLTAGE_LEVEL |
int32 |
Voltage level, in microvolts. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: VOLT_GET_LEVEL (SERVICE_ID: 0x08)
This service is used to get the current voltage level in microvolts of a voltage domain.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Voltage domain ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
VOLTAGE_LEVEL |
int32 |
Voltage level, in microvolts. |
Service Group - CLOCK (SERVICEGROUP_ID: 0x0008)
This service group is used to manage system clocks. Services defined in this group are used to enable or disable clocks, set or get clock rates, etc.
Each clock in the system is identified by a clock ID, which is a 32-bit integer
identifier assigned to each clock. The mapping of CLOCK_ID to clock is known to
both the application processor and the platform microcontroller.
Clock IDs are sequential and start from 0.
A device or a group of devices sharing the same clock source form a single clock domain identified by the CLOCK_ID. Any change to the clock source affects the entire domain, which may include multiple devices.
The topology of the devices and the clock source depends on the system design and is implementation specific. The operating system can discover this topology through supported hardware description mechanisms.
The following table lists the services in the CLOCK service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
CLK_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
CLK_GET_NUM_CLOCKS |
NORMAL_REQUEST |
0x03 |
CLK_GET_ATTRIBUTES |
NORMAL_REQUEST |
0x04 |
CLK_GET_SUPPORTED_RATES |
NORMAL_REQUEST |
0x05 |
CLK_SET_CONFIG |
NORMAL_REQUEST |
0x06 |
CLK_GET_CONFIG |
NORMAL_REQUEST |
0x07 |
CLK_SET_RATE |
NORMAL_REQUEST |
0x08 |
CLK_GET_RATE |
NORMAL_REQUEST |
Clock Rate Format
Each clock rate is a array of two 32-bit values (uint32, uint32) represented
as (clock_rate_low, clock_rate_high) and packed in the same order where
clock_rate_low is at the lower index than the clock_rate_high.
Discrete Format
A set of discrete clock rates arranged in a sequence, starting from the lowest value at the lowest index and increasing sequentially to higher clock rate. The following table shows the structure of the discrete clock rate format.
[clock_rate0, clock_rate1, clock_rate2, ... , clock_rate(N-1)]
where:
clock_rate0 < clock_rate1 < clock_rate2 < ... < clock_rate(N-1)| Word | Name | Description |
|---|---|---|
0 |
CLOCK_RATE_LOW |
Lower 32-bit clock rate in Hz. |
1 |
CLOCK_RATE_HIGH |
Upper 32-bit clock rate in Hz. |
Linear Range Format
A linear range of clock rates represented by minimum and maximum clock rate and a constant step size. The following table shows the fixed structure of the linear range format for clock rates.
[clock_rate_min, clock_rate_max, clock_step]| Word | Name | Description |
|---|---|---|
0 |
CLOCK_MIN_RATE_LOW |
Lower 32-bit of the lowest clock rate in Hz. |
1 |
CLOCK_MIN_RATE_HIGH |
Upper 32-bit of the lowest clock rate in Hz. |
2 |
CLOCK_MAX_RATE_LOW |
Lower 32-bit of the highest clock rate in Hz. |
3 |
CLOCK_MAX_RATE_HIGH |
Upper 32-bit of the highest clock rate in Hz. |
4 |
CLOCK_STEP_LOW |
Lower 32-bit of the step between two successive rates in Hz. |
5 |
CLOCK_STEP_HIGH |
Upper 32-bit of the step between two successive rates in Hz. |
A clock may also support clock rates which can be represented by multiple linear ranges. For example,
[clock_rate_min0, clock_rate_max0, clock_rate_step0],
[clock_rate_min1, clock_rate_max1, clock_rate_step1],
...,
[clock_rate_min(N-1), clock_rate_max(N-1), clock_rate_step(N-1)]The linear ranges must be packed sequentially such that
clock_rate_max0 < clock_rate_min1, clock_rate_max1 < clock_rate_min2 and
so on.
Service: CLK_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to CLOCK
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: CLK_GET_NUM_CLOCKS (SERVICE_ID: 0x02)
This service is used to query the number of clocks available in the system.
All supported clocks in the system are designated by an integer identifier
called CLOCK_ID.
| NA |
|---|
| Word | Name | Type | Description | ||||
|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||
1 |
NUM_CLOCKS |
uint32 |
Number of clocks. |
Service: CLK_GET_ATTRIBUTES (SERVICE_ID: 0x03)
This service provides detailed attributes of a clock, including its name,
represented as a 16-byte array of ASCII strings. It also specifies the
transition latency, which denotes the maximum time for the clock to stabilize
after a configuration change.
The FLAGS field encodes the clock formats supported by the clock. When the
format is of the discrete type, the NUM_RATES field returns the number of discrete
clock rates supported by the clock. In the case of linear range format the NUM_RATES
will return the number of linear ranges supported.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
CLOCK_ID |
uint32 |
Clock ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS |
uint32 |
|
||||||
2 |
NUM_RATES |
uint32 |
The number of discrete clock rates if the format is of discrete type, or the number of linear ranges if the format is linear range. |
||||||
3 |
TRANSITION_LATENCY |
uint32 |
Transition latency, in microseconds (us). |
||||||
4:7 |
CLOCK_NAME |
uint8[16] |
Clock name, a NULL-terminated ASCII string up to 16-bytes. |
Service: CLK_GET_SUPPORTED_RATES (SERVICE_ID: 0x04)
This service is used to get the supported clock rates. The clock rate data returned by this service depends on the format supported by the clock.
If the format is discrete, the message can pass the CLOCK_RATE_INDEX which is
the index to the first rate value to be described in the returned rate array. If all
supported rate values are required then this index value can be 0. Similarly, if
the format is linear range, then the CLOCK_RATE_INDEX is the index of the first linear
range to be described in the returned clock rate linear ranges. If all the supported
linear ranges are needed then this index value can be 0.
The total number of words required for the number of discrete clock rates or linear ranges according to the format in one message must not exceed the total words available in a message DATA field. If the format is linear range and a clock supports multiple linear ranges, then only complete linear ranges must be returned as per the data format of the linear range described in Linear Range Format.
If the total number of words required to store all supported discrete clock rates
or the linear ranges exceed the available words in message DATA field then REMAINING
and RETURNED must be set accordingly. In such condition, if the format is
discrete, the platform microcontroller will return the discrete clock rates which
can be accommodated in one message and set the RETURNED field to number of
discrete clock rates returned and REMAINING field is set to the remaining number
of discrete clock rates. Similarly if the format is linear, the linear ranges
which can be accommodated in one message are returned with RETURNED field set
to the number of linear ranges returned and REMAINING field is set to the
remaining number of linear ranges.
The application processor, when REMAINING field is not 0 must
call this service again with appropriate CLOCK_RATE_INDEX set to get the
remaining discrete clock rates or linear ranges.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
CLOCK_ID |
uint32 |
Clock ID. |
1 |
CLOCK_RATE_INDEX |
uint32 |
Clock rate index. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS |
uint32 |
Reserved and must be |
||||||
2 |
REMAINING |
uint32 |
The remaining number of discrete clock rates if the format is discrete type, or the remaining number of linear ranges if the format is linear range. |
||||||
3 |
RETURNED |
uint32 |
The number of discrete clock rates returned if the format is discrete type, or the number of linear ranges returned if the format is linear range. |
||||||
4 |
CLOCK_RATE[ ] |
uint32[2] |
Clock rates. |
Service: CLK_SET_CONFIG (SERVICE_ID: 0x05)
This service is used to configure a clock domain.
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
CLOCK_ID |
uint32 |
Clock ID. |
||||||
1 |
CONFIG |
uint32 |
Clock config.
|
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: CLK_GET_CONFIG (SERVICE_ID: 0x06)
This service is used to get the configuration of a clock domain.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
CLOCK_ID |
uint32 |
Clock ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
CONFIG |
uint32 |
Clock config.
|
Service: CLK_SET_RATE (SERVICE_ID: 0x07)
This service is used to set the clock rate of a specific clock.
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
CLOCK_ID |
uint32 |
Clock ID. |
||||||
1 |
FLAGS |
uint32 |
|
||||||
2 |
CLOCK_RATE_LOW |
uint32 |
Lower 32-bit of the clock rate in Hertz. |
||||||
3 |
CLOCK_RATE_HIGH |
uint32 |
Upper 32-bit of the clock rate in Hertz. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: CLK_GET_RATE (SERVICE_ID: 0x08)
This service is used to get the current clock rate.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
CLOCK_ID |
uint32 |
Clock ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
CLOCK_RATE_LOW |
uint32 |
Lower 32-bit of the clock rate in Hertz. |
||||||
2 |
CLOCK_RATE_HIGH |
uint32 |
Upper 32-bit of the clock rate in Hertz. |
Service Group - DEVICE_POWER (SERVICEGROUP_ID: 0x0009)
This DEVICE_POWER service group provides messages to manage the power states of a device power domain. This service group is used only for device power management since system and CPU power management is handled by already defined service groups such as SYSTEM_RESET, SYSTEM_SUSPEND and HART_STATE_MANAGEMENT.
A domain can consist of one device if its power states can be controlled independently or it may also have multiple devices if they all share the same power control lines and power states can only be changed collectively. Each domain must support ON and OFF states along with custom power states which are discoverable. Domains may also have power states which may preserve the context. The level of context preserved will depends on the level of power state.
Power states for domains will be discovered via supported hardware description mechanisms where the values for ON and OFF are already fixed and known. The power state encodes both the power state value and the context preserved or lost information corresponding to that state.
The DEVICE_POWER services take a 32-bit integer identifier known as DOMAIN_ID
to specify the device power domain. These DOMAIN_ID identifiers are sequential
and start from 0.
The following table lists the services in the DEVICE_POWER service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
DPWR_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
DPWR_GET_NUM_DOMAINS |
NORMAL_REQUEST |
0x03 |
DPWR_GET_ATTRIBUTES |
NORMAL_REQUEST |
0x04 |
DPWR_SET_STATE |
NORMAL_REQUEST |
0x05 |
DPWR_GET_STATE |
NORMAL_REQUEST |
Power State Format
The power state is represented as a 32-bit value. The following table shows the encoding for the power state.
| Bit | Name | Description | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
[31:17] |
RESERVED |
Reserved and must be |
||||||||||||||
[16] |
CONTEXT |
0b1: Context is lost. 0b0: Context is preserved. |
||||||||||||||
[15:0] |
VALUE |
|
Service: DPWR_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to DEVICE_POWER
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: DPWR_GET_NUM_DOMAINS (SERVICE_ID: 0x02)
This service is used to query the number of device power domains available which can be controlled by the client. The number of domains returned may be less than the actual number of domains present on the platform.
| NA |
|---|
| Word | Name | Type | Description | ||||
|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||
1 |
NUM_DOMAINS |
uint32 |
Number of device power domains. |
Service: DPWR_GET_ATTRIBUTES (SERVICE_ID: 0x03)
This service is used to query the attributes of a device power domain.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Device power domain ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS |
uint32 |
Reserved and must be |
||||||
2 |
TRANSITION_LATENCY |
uint32 |
Worst case transition latency of domain from one power state to another, in microseconds (us). |
||||||
3:6 |
DOMAIN_NAME |
uint8[16] |
Device power domain name, a NULL-terminated ASCII string up to 16-bytes. |
Service: DPWR_SET_STATE (SERVICE_ID: 0x04)
This service is used to change the power state of a device power domain.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Device power domain ID. |
1 |
POWER_STATE |
uint32 |
This field indicates the power state to which the power domain should transition. The specific power states and their meanings may vary depending on the implementation, but generally, they include values such as "ON", "OFF" and vendor specific power state. Refer Power State Format for more details. |
| Word | Name | Type | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: DPWR_GET_STATE (SERVICE_ID: 0x05)
This service is used to get the current power state of a device power domain.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Device power domain ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
POWER_STATE |
uint32 |
This field indicates the current power state of the specified domain. The power state can be one of several predefined values, such as ON, OFF, or vendor specific implementation. Refer Power State Format for more details. |
Service Group - PERFORMANCE (SERVICEGROUP_ID: 0x000A)
This PERFORMANCE service group is used to manage the performance of a
group of devices or application processors that operate in the same performance
domain. Unlike traditional performance control mechanisms, where the OS is
responsible for directly controlling voltages and clocks, this mechanism instead
operates on an metric less integer performance scale. Each integer value on this
scale represents a performance operating point. What this scale represents and
the metric is entirely platform-dependent. Values on this scale are represented
with performance level index, and the platform has complete control over
mapping these performance operating points to performance states, which are
eventually converted into hardware parameters such as voltage and frequency. The
level index does not need to be contiguous or to be on a linear scale. For
example, the mapping between levels index and frequencies can be as
straightforward as using a multiplication factor of 1000 or ascending index
number starting from 0.
The CPPC service group is designed for performance control, but it is only intended for application processors. This service group is primarily meant for devices such as GPUs and accelerators, though it can also be used for application processors.
It is important to distinguish between performance domains and power domains. A performance domain refers to a set of devices that must always operate at the same performance level, whereas a power domain refers to a set of devices that can be turned on or off together for power management purposes.
The following table lists the services in the PERFORMANCE service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
PERF_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
PERF_GET_NUM_DOMAINS |
NORMAL_REQUEST |
0x03 |
PERF_GET_ATTRIBUTES |
NORMAL_REQUEST |
0x04 |
PERF_GET_SUPPORTED_LEVELS |
NORMAL_REQUEST |
0x05 |
PERF_GET_LEVEL |
NORMAL_REQUEST |
0x06 |
PERF_SET_LEVEL |
NORMAL_REQUEST |
0x07 |
PERF_GET_LIMIT |
NORMAL_REQUEST |
0x08 |
PERF_SET_LIMIT |
NORMAL_REQUEST |
0x09 |
PERF_GET_FAST_CHANNEL_REGION |
NORMAL_REQUEST |
0x0A |
PERF_GET_FAST_CHANNEL_ATTRIBUTES |
NORMAL_REQUEST |
Performance Level Attribute
The following table shows the structure of a single performance level and its' attribute.
| Word | Name | Description |
|---|---|---|
0 |
INDEX |
Performance Level Index |
1 |
CLOCK_FREQ |
Clock frequency (kHz). |
2 |
POWER_COST |
Power cost (uW). |
3 |
TRANSITION_LATENCY |
Transition latency (us). |
Performance Fast-channel
This section provides an overview of the properties associated with the fast-channel for PERFORMANCE service group.
- Supported Services
-
The fast-channel currently supports only the following PERFORMANCE services:
-
PERF_GET_LEVEL
-
PERF_SET_LEVEL
-
PERF_GET_LIMIT
-
PERF_SET_LIMIT
-
- Platform Dependency
-
-
Not all performance domains or performance services are required to support fast-channel functionality.
-
Support for fast-channel depends on the platform implementation.
-
- Performance Fast-channel Shared Memory Region
-
-
In the memory region designated by the platform for fast-channels, it is essential that the Performance fast-channels are organized in a continuous memory block.
-
The shared memory region designated for fast-channels across performance service group must be a
power-of-twoin size. The base address and size (in bytes) of this shared memory region can be obtained through the servicePERF_GET_FAST_CHANNEL_REGION. The base address of the shared memory region must be aligned to 8 bytes.
-
- Discovering Fast-channel
-
-
Fast-channels support are discoverable through PERFORMANCE service calls.
-
To determine if a platform supports fast-channel for a specific performance domain, use the
PERF_GET_ATTRIBUTESservice call. -
If fast-channel support is available, retrieve fast-channel attributes for specific PERFORMANCE service call using the
PERF_GET_FAST_CHANNEL_ATTRIBUTESservice call. -
The
PERF_GET_FAST_CHANNEL_REGIONprovides physical memory for Performance Service Group. The offset of the physical address retrieve inPERF_GET_FAST_CHANNEL_ATTRIBUTESof the 'Performance Domain / Service ID' paired is based on the starting address inPERF_GET_FAST_CHANNEL_REGIONservice.
-
- Doorbell Support
-
-
The doorbell, if supported must be a memory mapped register with write access.
-
The doorbell details such as doorbell register address and write value can be discovered by the application processor through the
PERF_GET_FAST_CHANNEL_ATTRIBUTESservice. -
The doorbell register address is the physical address of the register. The doorbell write value is the value which must be written in the doorbell register to trigger the doorbell interrupt. The width of the doorbell write value must be equal to the doorbell register width.
NOTE: The write value may also contains other set bits which must persist on every write to the doorbell register.
-
Doorbell support is not available for
PERF_GET_LEVELandPERF_GET_LIMITservice calls. -
When fast-channels are implemented for
PERF_GET_LEVELandPERF_GET_LIMITservice calls, the last known valid performance level or performance limits are always accessible via the fast-channel without requiring a doorbell trigger. -
For other PERFORMANCE service calls that support fast-channel, doorbell support is optional.
-
- Payload Requirements
-
-
The payload of a fast-channel should exclusively include message specific parameters and exclude the
DOMAIN_ID. Since a fast-channel is specific to bothDOMAIN_IDandSERVICE_ID, there is no need to includeDOMAIN_IDor any other channel specific and message specific headers when using a fast-channel. For instance, the payload of thePERF_SET_LIMITmessage should consist of a 32-bitMAX_PERF_LEVELand a 32-bitMIN_PERF_LEVEL.
-
Notifications
When a client registers for performance change notifications, the platform will send notification to the client whenever there is a change in the performance level, performance limit or the performance power of a specific performance domain. This notification is typically sent by the platform microcontroller to inform clients in the system about changes in the performance domain.
| Event ID | Name | Event Data | Description | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0x01 |
PERF_POWER_CHANGE |
|
Performance power changed notification. |
||||||||||||
0x02 |
PERF_LIMIT_CHANGE |
|
Performance limit changed notification. |
||||||||||||
0x03 |
PERF_LEVEL_CHANGE |
|
Performance level changed notification. |
Service: PERF_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to PERFORMANCE
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: PERF_GET_NUM_DOMAINS (SERVICE_ID: 0x02)
This service returns the number of performance domains supported by the system. The number of performance domains may vary depending on the hardware platform and its implementation. In general, performance domains are used to group related hardware components, such as CPUs, GPUs, memory, and peripherals, into separate domains that can be independently controlled and managed. This allows for more fine-grained control over the performance of specific components, which can be important for optimizing system performance and power consumption.
| NA |
|---|
| Word | Name | Type | Description | ||||
|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||
1 |
NUM_DOMAINS |
uint32 |
Number of performance domains. |
Service: PERF_GET_ATTRIBUTES (SERVICE_ID: 0x03)
This service is used to retrieve the attributes of a specific performance domain. These attributes provide information about the performance capabilities and constraints of the domain, such as the performance limit and performance level.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Performance domain ID. |
| Word | Name | Type | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||||
1 |
FLAGS |
uint32 |
|
||||||||||
2 |
NUM_LEVELS |
uint32 |
The total number of supported performance levels. |
||||||||||
3 |
TRANSITION_LATENCY |
uint32 |
Minimum amount of time that needs to pass between two consecutive requests, in microseconds (us). |
||||||||||
4:7 |
DOMAIN_NAME |
uint8[16] |
Performance domain name, a NULL-terminated ASCII string up to 16-bytes. |
Service: PERF_GET_SUPPORTED_LEVELS (SERVICE_ID: 0x04)
This service provides a list of the available performance levels or also called
operating performance points (OPPs) for a specific performance domain. These
represent different performance levels that can be set for the components in the
domain, and are defined by a combination of frequency, power cost and other
parameters. By using this information, the OS can select the optimal
performance level based on the system’s workload and power constraints using
performance level index returned in this service.
/* Pseudocode to retrieve the list of the supported performance levels. */
index = 0;
num = 0;
/* Allocate a buffer based on the value returned from the NUM_LEVELS */
total_num_levels = perf_domain_attributes.num_levels;
loop:
list = get_domain_opp_list(index, domain_id);
entry_num = 0;
for (i = 0; i < list.returned; i++, num++) {
opp[num].index = list.entry[entry_num++];
opp[num].freq = list.entry[entry_num++];
opp[num].power = list.entry[entry_num++];
opp[num].transition_latency = list.entry[entry_num++];
}
/* Check if there are remaining OPP to be read */
if (list.remaining) {
index += list.returned;
goto loop;
}The pseudocode above demonstrates the process for retrieving the level
information for a specific performance domain. First, the number of
performance levels is determined by checking the NUM_LEVELS parameter
returned by the PERF_GET_ATTRIBUTES service.
The total number of performance levels included in one message must not exceed
the available word count in the message’s DATA field. If the performance levels
exceed this limit, the platform microcontroller will return the number of
levels that can be accommodated in one message and set the REMAINING field
accordingly. When the REMAINING field is not zero, the application processor
must call this service again with the appropriate PERF_LEVEL_INDEX to retrieve
the remaining levels. Multiple service calls may be required to obtain all the
levels.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Performance domain ID. |
1 |
PERF_LEVEL_INDEX |
uint32 |
Index of performance data array. The first index starts at zero. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS |
uint32 |
Reserved and must be |
||||||
2 |
REMAINING |
uint32 |
Remaining number of levels (number of arrays). |
||||||
3 |
RETURNED |
uint32 |
Number of levels returned (number of arrays). |
||||||
4 |
LEVEL[] |
uint32[4] |
List of performance levels attributes. |
Service: PERF_GET_LEVEL (SERVICE_ID: 0x05)
This service is used to obtain the current performance level index of a specific performance domain in the system.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Performance domain ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
LEVEL |
uint32 |
Current performance level index of the domain. |
Service: PERF_SET_LEVEL (SERVICE_ID: 0x06)
This service is used to set the current performance level index of a specific performance domain in the system.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Performance domain ID. |
1 |
LEVEL |
uint32 |
Performance level index. |
| Word | Name | Type | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: PERF_GET_LIMIT (SERVICE_ID: 0x07)
This service is used to obtain the current performance limit of a specific performance domain in the system.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Performance domain ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
MAX_PERF_LEVEL |
uint32 |
Maximum allowed performance level index. |
||||||
2 |
MIN_PERF_LEVEL |
uint32 |
Minimum allowed performance level index. |
Service: PERF_SET_LIMIT (SERVICE_ID: 0x08)
This service is used to set the performance limit of a specific
performance domain in the system. The platform must ensure that any subsequent
calls to PERF_SET_LEVEL to adjust the performance level remain within the
currently defined limits.
If the current performance level falls outside the newly defined minimum or maximum ranges, the platform will automatically adjust it to comply with the updated limits.
|
Examples:
|
If notifications are enabled, the platform will send an appropriate
notification (e.g., PERF_LEVEL_CHANGE, PERF_POWER_CHANGE, etc.) to the
application processor.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Performance domain ID. |
1 |
MAX_PERF_LEVEL |
uint32 |
Maximum allowed performance level index. |
2 |
MIN_PERF_LEVEL |
uint32 |
Minimum allowed performance level index. |
| Word | Name | Type | Description | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
Service: PERF_GET_FAST_CHANNEL_REGION (SERVICE_ID: 0x09)
This service retrieves the physical address of the fast-channel region used in the performance service group. The fast-channel region is grouped in a continuous block of memory to ease the configuration of memory region protection.
| NA |
|---|
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code
|
||||||
1 |
REGION_PHYS_ADDR_LOW |
uint32 |
Lower 32-bit of the fast-channels shared memory region physical address. |
||||||
2 |
REGION_PHYS_ADDR_HIGH |
uint32 |
Upper 32-bit of the fast-channels shared memory region physical address. |
||||||
3 |
REGION_SIZE_LOW |
uint32 |
Lower 32-bit of the fast-channels shared memory region size. |
||||||
4 |
REGION_SIZE_HIGH |
uint32 |
Upper 32-bit of the fast-channels shared memory region size. |
Service: PERF_GET_FAST_CHANNEL_ATTRIBUTES (SERVICE_ID: 0x0A)
This service allows clients to query attributes of the fast-channel for a specific performance domain and performance service.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
DOMAIN_ID |
uint32 |
Performance domain ID. |
1 |
SERVICE_ID |
uint32 |
Performance Service ID. Refer service ID in Table 131. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
FLAGS |
uint32 |
|
||||||||
2 |
FASTCHAN_OFFSET_LOW |
uint32 |
Lower 32-bit offset of fast-channel physical address region. |
||||||||
3 |
FASTCHAN_OFFSET_HIGH |
uint32 |
Upper 32-bit offset of fast-channel physical address region. |
||||||||
4 |
FASTCHAN_SIZE |
uint32 |
The size of fast-channel physical address in bytes. |
||||||||
5 |
DB_ADDR_LOW |
uint32 |
Lower 32-bit of doorbell register address for Performance Request fast-channel. This field is unused if the doorbell is not supported. |
||||||||
6 |
DB_ADDR_HIGH |
uint32 |
Upper 32-bit of doorbell register address for Performance Request fast-channel. This field is unused if the doorbell is not supported. |
||||||||
7 |
DB_WRITE_VALUE |
uint32 |
32-bit doorbell write value for Performance Request fast-channel. |
Service Group - MANAGEMENT_MODE (SERVICEGROUP_ID: 0x000B)
This MANAGEMENT_MODE service group provides RPMI client a mechanism to invoke the Management Mode (MM) in a secure execution environment. For general background on Management Mode, refer to the Platform Initialization (PI) specifications [4], Volume 4: Management Mode Core Interface.
The Management Mode (MM) provides an environment for implementing OS agnostic
MM services such as secure variable storage, and firmware updates in the platform
firmware. The MANAGEMENT_MODE service group defines RPMI services for invoking an
MM service synchronously where the MM_COMMUNICATE RPMI service is used as a
synchronous call from the non-secure world to the secure world and the data exchanged
with the MM service is passed via special Management Mode (MM) shared memory.
The following table lists the services in the MANAGEMENT_MODE service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
MM_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
MM_GET_ATTRIBUTES |
NORMAL_REQUEST |
0x03 |
MM_COMMUNICATE |
NORMAL_REQUEST |
Service: MM_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to MANAGEMENT_MODE
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: MM_GET_ATTRIBUTES (SERVICE_ID: 0x02)
This RPMI service gets the attributes about Management Mode, including MM version, MM shared memory location, etc.
| NA |
|---|
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
MM_VERSION |
uint32 |
Management Mode version.
|
||||||
2 |
MM_SHMEM_ADDR_LOW |
uint32 |
Lower 32-bit of the MM shared memory physical address. |
||||||
3 |
MM_SHMEM_ADDR_HIGH |
uint32 |
Upper 32-bit of the MM shared memory physical address. |
||||||
4 |
MM_SHMEM_SIZE |
uint32 |
The size of MM shared memory in bytes. |
Service: MM_COMMUNICATE (SERVICE_ID: 0x03)
The MM_COMMUNICATE service invokes an MM service implemented in the secure
execution environment. The input data needed to identify and invoke the MM
service is referred to as MM_COMM_INPUT_DATA whereas the output data returned
by the MM service is referred to as MM_COMM_OUTPUT_DATA. The RPMI client in
the non-secure execution environment provides the location of MM_COMM_INPUT_DATA
and MM_COMM_OUTPUT_DATA in the MM shared memory as parameters of MM_COMMUNICATE
service.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
MM_COMM_INPUT_DATA_OFFSET |
uint32 |
The offset in the MM shared memory where the input data is passed to the MM service. |
1 |
MM_COMM_INPUT_DATA_SIZE |
uint32 |
The size of the input data in the MM shared memory. |
2 |
MM_COMM_OUTPUT_DATA_OFFSET |
uint32 |
The offset in the MM shared memory where the output data will be written by the MM service. |
3 |
MM_COMM_OUTPUT_DATA_SIZE |
uint32 |
The maximum size of the output data which can be written by the MM service in the MM shared memory. |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
MM_COMM_RETURN_DATA_SIZE |
uint32 |
Actual size of the output data written by the MM service in the MM shared memory. |
Service Group - RAS_AGENT (SERVICEGROUP_ID: 0x000C)
The RAS_AGENT service group provides services to enumerate various error sources in a system and to retrieve their descriptors.
Each error source in a system is assigned a unique 32-bit identification number,
referred to as RAS_ERR_SRC_ID.
The following table lists the services in the RAS_AGENT service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
RAS_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
RAS_GET_NUM_ERR_SRCS |
NORMAL_REQUEST |
0x03 |
RAS_GET_ERR_SRCS_ID_LIST |
NORMAL_REQUEST |
0x04 |
RAS_GET_ERR_SRC_DESC |
NORMAL_REQUEST |
Error Source Descriptor Format
ACPI Systems
For systems that support ACPI/APEI, the format of the error source descriptor
is as defined in ACPI specification v6.4 or above, (GHESv2) [3].
If the value of RAS_GET_ERR_SRC_DESC.FLAGS[3:0] is 0, it indicates that the
error source descriptor format is GHESv2.
The RAS agent populates the error source descriptor fields according to the
error source specified by RAS_ERR_SRC_ID.
The error source descriptor has an error_status_structure field which
is a generic address structure (GAS) as defined in ACPI v6.4 (GHESv2)
[3]. This field specifies the location of a register that contains the
physical address of a block of memory that holds the error status data for the
specified error source. This block of memory is referred to as
error_status_block. The allocation of error_status_block is platform
dependent and is done by the RAS agent. The physical address of
error_status_block is stored in the error_status_structure field of the
error source descriptor being returned.
|
Service: RAS_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to RAS_AGENT
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: RAS_GET_NUM_ERR_SRCS (SERVICE_ID: 0x02)
This service queries number of error sources available in the system.
| NA |
|---|
| Word | Name | Type | Description | ||||
|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||
1 |
NUM_ERR_SRCS |
uint32 |
Number of error sources. |
Service: RAS_GET_ERR_SRCS_ID_LIST (SERVICE_ID: 0x03)
This service returns a list of RAS_ERR_SRC_ID for all error sources present
in the system. The RAS_ERR_SRC_ID can be used to get the associated
descriptor of the error source.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
START_INDEX |
uint32 |
Starting index of |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS |
uint32 |
Reserved and must be |
||||||
2 |
REMAINING |
uint32 |
Remaining number of error source IDs. |
||||||
3 |
RETURNED |
uint32 |
Number of error source IDs returned in this request. |
||||||
4 |
RAS_ERR_SRC_ID[N] |
uint32 |
An array of error source IDs where each entry in the array is a unique error source ID. N is equal to |
Service: RAS_GET_ERR_SRC_DESC (SERVICE_ID: 0x04)
This service retrieves the error source descriptor of an error source specified
by RAS_ERR_SRC_ID.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
RAS_ERR_SRC_ID |
uint32 |
Error source ID for which attributes are to be returned. |
1 |
BYTE_OFFSET |
uint32 |
Offset from which the descriptor is to be read. Offset |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
FLAGS |
uint32 |
|
||||||
2 |
REMAINING |
uint32 |
Remaining number of bytes to be read. |
||||||
3 |
RETURNED |
uint32 |
Number of bytes read in this request. |
||||||
4 |
ERR_SRC_DESC[N] |
uint8 |
Full or partial descriptor N is equal to the |
Service Group - REQUEST_FORWARD (SERVICEGROUP_ID: 0x000D)
The REQUEST_FORWARD service group allows application processors to retrieve and process RPMI request messages which are forwarded by platform microcontroller from some other RPMI client. This service group also allows an SBI implementation to forward RPMI request messages from one system-level partition (or domain) to another using the SBI MPXY extension [1].
The platform microcontroller (or SBI implementation) should maintain a first-in first-out queue of forwarded RPMI request messages. The first (or oldest) forwarded RPMI request message in the queue is referred to as the current forwarded RPMI request message. The RPMI services defined by the REQUEST_FORWARD service group allow application processors to retrieve and process one forwarded RPMI request message at a time.
The Table 169 below lists the services defined by the REQUEST_FORWARD service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
REQFWD_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
REQFWD_RETRIEVE_CURRENT_MESSAGE |
NORMAL_REQUEST |
0x03 |
REQFWD_COMPLETE_CURRENT_MESSAGE |
NORMAL_REQUEST |
Notifications
The Table 89 below lists the notification events defined by the REQUEST_FORWARD service group.
| Event ID | Name | Event Data | Description |
|---|---|---|---|
0x01 |
REQFWD_NEW_MESSAGE |
An array of |
This RPMI notification event represents the arrival of a new forwarded RPMI request message when there were no other pending forwarded RPMI request message in the queue. |
Service: REQFWD_ENABLE_NOTIFICATION (SERVICE_ID: 0x01)
This service allows the application processor to subscribe to REQUEST_FORWARD
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state. 0: Disable. 1: Enable. 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled. 1: Notification is enabled. In case of |
Service: REQFWD_RETRIEVE_CURRENT_MESSAGE (SERVICE_ID: 0x02)
This service allows application processors to retrieve the current forwarded RPMI request message. The current message may be the oldest forwarded RPMI request message in the platform microcontroller (or SBI implementation) queue.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
START_INDEX |
uint32 |
Starting index of first byte of the current forwarded RPMI request message. Use
|
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||||
1 |
REMAINING |
uint32 |
Remaining number of bytes in the current forwarded RPMI request message. |
||||||||
2 |
RETURNED |
uint32 |
Number of bytes |
||||||||
3 |
REQUEST_MESSAGE[N] |
uint8 |
An array of |
Service: REQFWD_COMPLETE_CURRENT_MESSAGE (SERVICE_ID: 0x03)
This service allows the application processors to inform the platform microcontroller (or SBI implementation) that:
-
The processing of the current forwarded RPMI request message has completed and RPMI response message must be sent to the original source of RPMI request message.
-
The current forwarded RPMI request message must now point to the next forwarded RPMI request message if available.
If the service is called without retrieving the message, an error is returned.
The service also returns NUM_MESSAGES, which is the number of forwarded messages
available for retrieval from the platform microcontroller, excluding the current
forwarded message.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
RESPONSE_DATA[N] |
uint8 |
An array of bytes representing the RPMI message data to be send as
response data for the current forwarded RPMI request message. The |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code.
|
||||||
1 |
NUM_MESSAGES |
uint32 |
Number of forwarded messages available for retrieval, excluding the current forwarded message. |