Packet Encapsulation for E-Trace

[chapter2] describes the packet encapsulation in general terms. This chapter describes how that applies in the context of E-Trace.

The RISC-V Trace Control Interface Specification includes several fields relevant for the construction and synchronization of packets, as described in the following sections.

srcID

  • trTeInhibitSrc in the trTeControl register of a trace encoder indicates whether a srcID is present or absent in the encapsulated packets;

  • trTeSrcBits in the trTeInstFeatures register indicates the length of the srcID;

  • trTeSrcID in the trTeInstFeatures register indicates the value of the srcID associated with that particular source.

timestamp

  • When trTsEnable in the trTsControl register is 1, a timestamp may be optionally included, via the timestamp field in the encapsulated packets. When present, header.extend will be 1 as described in [_section_Timestamp];

  • trTsWidth in the trTsControl register indicates the number of bits in timestamp fields.

Note that some E-Trace packets may optionally include a time field, as an alternative method of providing time information. Presence or absence of this is fixed for a given system based on a discoverable parameter, but is not run-time configurable.

type

The capabilities of the trace source will determine the minimum width of the type field in the payload field-group. For E-Trace:

  • If only instruction trace is supported, the minimum width is 0 (i.e. the field is omitted)

  • If both instruction and data trace are supported, the minimum width is 1, encoded as

    • 0: Instruction trace packet

    • 1: Data trace packet

  • A width of 2 or more is permited for applications where packet types other than instruction and data trace are required. Encoding for this case is application specific and not mandated by this standard.

Synchronization

  • trPibAsyncFreq, trRamAsyncFreq and trAtbBridgeAsyncFreq in the trPibControl, trRamControl and trAtbBridgeControl registers respectively are used to determine the interval between insertion of synchronization sequences.