RISCV RISCV
Home Home
  • RISC-V Specifications
Platform Software
    • Boot and Runtime Services
      • Copyright and License
      • Contributors
      • Introduction
      • Chapter 1. Recipes
      • Chapter 2. Hart Requirements
      • Chapter 3. SBI Requirements
      • Chapter 4. BRS-I UEFI Requirements
      • Chapter 5. BRS-I ACPI Requirements
      • Chapter 6. BRS-I SMBIOS Requirements
      • Chapter 7. Bibliography
    • Functional Fixed Hardware
      • Copyright and License
      • Contributors
      • Change Log
      • Introduction
      • Chapter 1. RISC-V FFH Resource Descriptor Encoding
      • Chapter 2. Use Cases
      • Chapter 3. _LPI Object Examples
      • Appendix A. _CPC Object Examples
    • IO Mapping Table
      • Copyright and License
      • Contributors
      • Changelog
      • Terms and Abbreviations
      • Introduction
      • Chapter 1. RISC-V IO Mapping Table (RIMT)
      • Chapter 2. ID Mapping Examples
      • Chapter 3. Bibliography
    • Platform Management Interface (RPMI)
      • Copyright and License
      • Contributors
      • Changelog
      • Terms and Abbreviations
      • Introduction
      • Chapter 1. Transport
      • Chapter 2. Messaging Protocol
      • Chapter 3. Service Groups
      • Chapter 4. Integration with SBI MPXY Extension
      • Chapter 5. Bibliography
    • QoS Controllers Table
      • Copyright and License
      • Contributors
      • Introduction
      • Chapter 1. The ACPI RQSC Table
      • Chapter 2. Example ACPI Table Implementation
      • Chapter 3. Bibliography
    • Semihosting
      • Copyright and License
      • Contributors
      • Introduction
      • Chapter 1. Semihosting Binary Interface
      • Chapter 2. Bibliography
  • Supervisor Binary Interface
    • Title Page
    • Copyright and License
    • Contributors
    • Changelog
    • Chapter 1. Introduction
    • Chapter 2. Terms and Abbreviations
    • Chapter 3. Binary Encoding
    • Chapter 4. Base Extension (EID #0x10)
    • Chapter 5. Legacy Extensions (EIDs #0x00 - #0x0F)
    • Chapter 6. Timer Extension (EID #0x54494D45 "TIME")
    • Chapter 7. IPI Extension (EID #0x735049 "sPI: s-mode IPI")
    • Chapter 8. RFENCE Extension (EID #0x52464E43 "RFNC")
    • Chapter 9. Hart State Management Extension (EID #0x48534D "HSM")
    • Chapter 10. System Reset Extension (EID #0x53525354 "SRST")
    • Chapter 11. Performance Monitoring Unit Extension (EID #0x504D55 "PMU")
    • Chapter 12. Debug Console Extension (EID #0x4442434E "DBCN")
    • Chapter 13. System Suspend Extension (EID #0x53555350 "SUSP")
    • Chapter 14. CPPC Extension (EID #0x43505043 "CPPC")
    • Chapter 15. Nested Acceleration Extension (EID #0x4E41434C "NACL")
    • Chapter 16. Steal-time Accounting Extension (EID #0x535441 "STA")
    • Chapter 17. Supervisor Software Events Extension (EID #0x535345 "SSE")
    • Chapter 18. SBI Firmware Features Extension (EID #0x46574654 "FWFT")
    • Chapter 19. Debug Triggers Extension (EID #0x44425452 "DBTR")
    • Chapter 20. Message Proxy Extension (EID #0x4D505859 “MPXY”)
    • Chapter 21. Experimental SBI Extension Space (EIDs #0x08000000 - #0x08FFFFFF)
    • Chapter 22. Vendor Specific Extension Space (EIDs #0x09000000 - #0x09FFFFFF)
    • Firmware Specific Extension Space (EIDs #0x0A000000 - #0x0AFFFFFF)
    • References
    • UEFI PROTOCOL
      • Copyright and License
      • Chapter 1. Contributors
      • Chapter 2. Introduction
      • Chapter 3. RISCV_EFI_BOOT_PROTOCOL
      • Bibliography
Report a Problem GitHub Project More Details Download PDF
  • RISC-V Specifications
  • Platform Software Overview
  • QoS Controllers Table

3.1. Bibliography

3.1. Bibliography

[1]

[2]

Chapter 2. Example ACPI Table Implementation
riscv.org Technical Hub Code of Conduct Privacy Policy Join RISC-V

Copyright © RISC-V International®. All rights reserved. RISC-V, RISC-V International, and the RISC-V logos are trademarks of RISC-V International.